COSC 435 - Acceleration

Credit Hours: 4
Frequency of Offering: Offered in alternate years, usually in the fall semester

This course will study the tools, techniques and architectures to provide hardware acceleration of software. Topics include: high-level synthesis, register transfer level descriptions and synthesis, gate and transistor level descriptions, finite state machines, systolic arrays and pipeline architectures. Both Field Programmable Gate Array (FPGA) and custom integrated circuit approaches will be covered. In addition to the application of Electronic Design Automation (EDA) tools, the algorithms they use will be described.

Prerequisite(s): COSC 230 or permission of instructor.